High-k Gate Stacks Influence on Characteristics of Nano-scale MOSFET Structures
The models of electro-physical effects built-into Sentaurus TCAD have been tested. The models providing an adequate modeling of deep submicron high-k MOSFETs have been selected. The gate and drain leakage currents for 45 nm MOSFET with PolySi gate and SiO2, SiO2/HfO2 and HfO2 gate dielectrics have been calculated using TCAD. It has been shown that the replacement of traditional SiO2 by an equivalent HfO2 dielectric considerably reduces the gate leakage current by several orders due to elimination of the tunneling effect influence. Besides, the threshold voltage, saturation drain current, mobility, transconductance, etc. degrade witahin 10-20% range.