Compact Power BJT and MOSFET models parameter extraction with account for thermal effects
The corrections of the methodology of power BJT and MOSFET transistor models parameter extraction taking into account the self heating effects are presented. For BJT these corrections are included into VBIC model parameter extraction process. For MOSFET current generator connected to standard SPICE MOS model is proposed to take into account drain current growth with transistor temperature.
The article highlights the status of TCAD and SPICE modeling of CMOS, SOI CMOS, SiGe BiCMOS VLSI components intended for operation under the influence of radiation (neutrons, electrons, protons, y- and X-ray, single particle, pulsed radiation), high (up to +300°C) and low (up to –200°C) temperatures. TCAD and SPICE models of BJTs and MOSFETs, and methods for determining their parameters have been described. Further directions of TCAD and SPICE modeling of IС components have been considered.
System for thermal design on chip- and board-level of electronic components is introduced. It is integrated with Mentor Graphics CAD and consists of three subsystems: thermal design in IC Station; thermal design in Expedition PCB; thermal measurement for verification of temperature modeling results.
Hardware-software subsystem designed for MOSFETs characteristic measurement and SPICE model parameter extraction taking into account radiation effects is presented. Parts of the system are described. The macromodel approach is used to account for radiation effects in MOSFET modeling. Particularities of the account for radiation effects in MOSFETs within the measurement and model parameter extraction procedures are emphasized. Application of the subsystem is illustrated on the example of radiation hardened 0.25 μm SOI MOSFET test structures.
The monograph presents results by professor Dr. A. Shalumov’s Research School of Modeling, Information Technology and Automated Systems (Russia). The program, ASONIKA, developed by the school is reviewed here regarding reliability and quality of devices for simulation of electronics and chips during harmonic and random vibration, single and multiple impacts, linear acceleration and acoustic noise, and steady-state and transient thermal effects. Calculations are done for thermal stress during changes in temperature and power in time. Calculations are done for number of cycles to fatigue failure under mechanical loads as well as under cyclic thermal effects. Simulation results for reliability analysis are taken into account. Models, software interface, and simulation examples are presented.
For engineers and scientists involved in design automation of electronics.
New quasi – 3D numerical model for thermal analysis of the BGA packages is presented. The general 3D heat transfer problem is correctly transformed to the set of 2D equations for temperature distributions in different layers of the package. The complexity and CPU time of the thermal analysis are many times reduced. The results of BGA package thermal modeling are presented.
The 25th THERMINIC Workshop will be held in Lecco, on the shores of Lake Como, Italy. THERMINIC is the major European Workshop related to thermal issues in electronic components and systems. For academics and industrialists involved in both micro and power electronics this annual event promises to be a very special occasion with a high quality technical programme and exciting social events. We invite delegates to consider submitting abstracts that are related to, but not limited to, the following topics: Thermal Phenomena, Simulation and Experiment • Thermal management of electronic components and systems • Classical and modern thermometry and thermography • Multi-physics simulation and field coupling • Thermal interface materials • Thermal modelling and investigation of packages • Thermal management of power electronics • High Temperature electronics • Solid state lighting / LED’s • Thermal characterisation of micro and nano domains • CFD modelling and benchmarking • Advanced thermal materials • Heat transfer on the nano-scale • Thermal performance of interconnects • Temperature mapping • Electro-thermal interactions • Nanotechnology applications • Flow visualisation Electronics Cooling Concepts • Thermo-electric cooling • Novel and advanced cooling technologies • Sub-ambient cooling • Heat pipe assisted cooling • 3D integration and cooling concepts • Cooling concepts: air, liquid, etc. • Ultra low form factor air cooling • Novel manufacturing methods • E-vehicle cooling Thermo-Mechanical Reliability • Thermo-mechanical reliability • Prognostics and health monitoring • Lifetime modelling and prediction • Damage and fracture mechanics
The methodology of modeling and simulation of environmentally induced faults in radiation hardened SOI/SOS CMOS IC’s is presented. It is realized at three levels: CMOS devices – typical analog or digital circuit fragments – complete IC’s. For this purpose, a universal compact SOI/SOS MOSFET model for SPICE simulation software with account for TID, dose rate and single event effects is developed. The model parameters extraction procedure is described in great depth taking into consideration radiation effects and peculiarities of novel radiation-hardened (RH) SOI/SOS MOS structures. Examples of radiation-induced fault simulation in analog and digital SOI/SOS CMOS LSI’s are presented for different types of radiation influence. The simulation results show the difference with experimental data not larger than 10‒20% for all types of radiation.