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TCAD-SPICE Analysis of SEU and Reliability in Space-Grade SRAM from 90 nm to 28 nm

P. 171–184.
Petrosyants K. O., Kharitonov I. A., Denis S. Silkin

The study presents the results of developing a combined TCAD-SPICE model of the behavior of CMOS memory cells under space impact conditions. The study analyzes both degradation from prolonged cosmic radiation and single-event upsets (SEUs) caused by high-energy particle strikes, which can flip memory states in space-based electronics. The dependence of SEU hardness on cell size is examined for process nodes of 90, 65, and 28 nm. Additionally, the influence of critical design parameters—including channel width, supply voltage, and drain or source junction depth—on single-event upset (SEU) susceptibility is investigated.

Language: English
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DOI
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Keywords: SPICETCADdegradationsingle-event upset (SEU)CMOS memory
Publication based on the results of:
Methods and tools for the development and implementation of digital twins for electronic engineering (2025)

In book

Proceedings of the Future Technologies Conference (FTC) 2025, Volume 3
Proceedings of the Future Technologies Conference (FTC) 2025, Volume 3
Kharitonov I. A. Vol. 3. , Springer Publishing Company, 2026.
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