Automation of NoC throughput search in high-level modeling

P. 1–5.

A.A. Amerikanov, A.S. Ponomarev, T.V. Tarzhanov

This work is devoted to the development of a single environment for high-level Network-on-Chip (NoC) modeling. The developed environment includes several highlevel models and optimization methods. This concept allows for more accurate modeling and reduces simulation time. The concept of the software environment is proposed, and the requirements for added models are described. Methods for optimizing the process of high-level NoC modeling (the comparative method, parallel launch of several models, binary search method, golden section method, similarity method) are developed and tested. Modelling results are studied using the methods proposed.

Keywords: high-level modeling, NoC, NoC topology, high-level NoC model, optimization method

Publication based on the results of: Research of new promising topologies and routing methods for use in networks-on-сhip (2022)

In book

Proceedings of 2022 IEEE Moscow Workshop on Electronic and Networking Technologies (MWENT)

M.: IEEE, 2022.