SPICE моделирование КМОП ИС для экстремальных применений с помощью компактных «электро-термо-рад» моделей
Using published MOSFETs characteristic degradation after TID irradiation in various thermal ambient parameters of “electro-thermo-rad” SPICE models were defined. Two examples were considered: radiation hardened 2 µm CMOS technology of Sandia National Laboratory and 130 nm CMOS technology. Models were verified using SRAM sell simulation (for 2 µm technology) and voltage reference, ring oscillator and logic gates circuit (for 130 nm technology). For the cases when elevated temperature leads to enhanced interface traps generation in MOSFET oxides, the paper presents quantitative estimates for the increased degradation of mentioned circuits characteristics under the mentioned external conditions. The importance of taking into account the combined temperature and total dose influence on CMOS circuit is shown.