Automation of Parameter Extraction Procedure for Si JFET SPICE Model in the −200…+110°C Temperature Range
Through the analysis of JFET models with account for temperature effects, the most suitable one was selected as a basis for expanding SPICE modeling possibilities to cryogenic-to-high temperature range. Parameter extraction procedure was automated and improved using IC-CAP scripting capabilities.
In this work, results of electrical measurements and their analysis are demonstrated for a small-scale 180-nm SOI CMOS technology in the extended temperature range (up to 300°C). Comparison with high temperature electrical characteristics of 0.5 um technology is drawn. Modified model for SOI MOSFETs, based on BSIMSOI model is developed and model parameters are extracted for SPICE simulation of IC blocks. Results of subsequent SPICE simulation of analog and digital circuit blocks characteristics are presented. The potential feasibility of using small-scale SOI CMOS technology (180-nm) for extended temperature range integrated circuits (ICs) is demonstrated.
The goal of this International Roadmap for Devices and Systems (IRDS) chapter is to survey, catalog, and assess the status of technologies in the areas of cryogenic electronics and quantum information processing. Application drivers are identified for sufficiently developed technologies and application needs are mapped as a function of time against projected capabilities to identify challenges requiring research and development effort. Cryogenic electronics (also referred to as low-temperature electronics or cold electronics) is defined by operation at cryogenic temperatures (below −150 °C or 123.15 K) and includes devices and circuits made from a variety of materials including insulators, conductors, semiconductors, superconductors, or topological materials. Existing and emerging applications are driving development of novel cryogenic electronic technologies. Information processing refers to the input, transmission, storage, manipulation or processing, and output of data. Information processing systems to accomplish a specific function, in general, require several different interactive layers of technology. A top-down list of these layers begins with the required application or system function, leading to system architecture, micro- or nano-architecture, circuits, devices, and materials. A fundamental unit of information (e.g., a bit) is represented by a computational state variable, for example, the position of a bead in the ancient abacus calculator or the voltage (or charge) state of a node capacitance in CMOS logic. A binary computational state variable serves as the foundation for von Neumann computational system architectures that dominated conventional computing. Quantum information processing is different in that it uses qubits, two-state quantum-mechanical systems that can be in coherent superpositions of both states at the same time, which can have computational advantages. Measurement of a qubit in a given basis causes it to collapse to one of the basis states. Technology categories covered in this report include: • Superconductor electronics (SCE) • Cryogenic semiconductor electronics (Cryo-Semi) • Quantum information processing (QIP)
The article highlights the status of TCAD and SPICE modeling of CMOS, SOI CMOS, SiGe BiCMOS VLSI components intended for operation under the influence of radiation (neutrons, electrons, protons, y- and X-ray, single particle, pulsed radiation), high (up to +300°C) and low (up to –200°C) temperatures. TCAD and SPICE models of BJTs and MOSFETs, and methods for determining their parameters have been described. Further directions of TCAD and SPICE modeling of IС components have been considered.
This paper presents Low-T SPICE models of sub-micron MOSFETs, designed to calculate electronic circuits in the cryogenic temperature range (down to 4 K). The procedure for extracting the Low-T SPICE model parameters based on the measurement results or TCAD simulation of a standard set of I-V and C-V characteristics in the cryogenic temperature range has been developed.
The temperature range of SPICE models of bipolar and field-effect transistors is extended from the standard commercial level (-60...+150 °C) to harsh conditions level (-200...+300 °C) for low/high temperature ICs design. This is done by including additional equations for temperaturedependent parameters, and by connecting additional elements to the device equivalent circuit to take into account the thermal effects. The universal automated methodology of model parameters extraction from the experimental data measured at low and high temperatures is proposed. The good agreement between simulated and measured device characteristics is achieved. The RMS error is not more than 10–20%.
Hardware-software system designed for automated SOI MOSFETs characteristics measurement, processing and SPICE model parameter extraction taking into account high temperature (HT) effects (to 300°C) is presented. The essence of the system is comprised of a set of selected measurement instru-ments, measurement and data processing methods with the pur-pose of SPICE model library creation in lightly manned condi-tions. This capability to program measurement conditions and data collection, processing and saving is realized with in-house LabVIEW virtual instruments.
I-V characteristics and reliability parameters for the set of hardened SOIMOSFET'swith special layouts and tungsten metallization to provide additional thermal tolerance for high-temperature SOI CMOS IC's are investigated in the temperature range up to 300 °C. The reliability aspects under test for MOSFET's are threshold voltage shift, subthreshold slope and mobility degradation, gate leakage current rise; for tungsten metallization (contacts, conductor lines and vias) I-T and R-T characteristics, failure time. The SOI MOSFET standard compact SPICE model BSIMSOI with traditional temperature limit of 150 °C ismodified to be used for CMOS IC simulation in the extended temperature range up to 300 °C. The results indicate that the 0.5–0.18 μm SOI MOSFET's with tungsten metallization have stable electrical behavior that makes them possible to be used during implementation of HT CMOS IC's (to 300 °C).