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Simulation and Synthesis of Networks-on-Chip by Using NoCSimp HDL Library
P. 300–303.
This paper proposes an approach to the synthesis and modeling of networks-on-chip (NoCs) by using the NoCSimp library based on a simplified wormhole router with central buffer and without virtual channels. The analysis of the results of simulation and synthesis of NoCs with regular and quasi-optimal topologies with number of nodes 8 and 9 is given. It is shown that in the case where the number of NoC nodes is not a power of 2 the use of quasi-optimal topologies offers a significant advantage.
In book
Kiev: NTUU "KPI", 2016.
Stukach O., В кн.: Международная научно-техническая конференция РЭиС-2025Т. 1.: Омский научно-исследовательский институт приборостроения, 2025. С. 124–126.
На основе идеологии нечёткой логики предложены алгоритмы и набор правил для выявления перегрузок маршрутизаторов сети на кристалле (Network-on-Chip, NoC). Разработанные алгоритмы позволяют рассчитывать вероятность перегрузки маршрутизаторов и для различных сценариев нагрузки строить тепловые карты состояния сети. Многочисленные примеры показали эффективность предложенных алгоритмов своевременного выявления перегрузок, что даёт широкую возможность адаптации протоколов маршрутизации в сетях NoC ...
Added: March 16, 2026
Mikhail Y. Romashikhin, Aleksandr Y. Romanov, IEEE Access 2026 Vol. 14 P. 7921–7931
This paper presents a hardware-software multi-FPGA complex designed for hardware prototyping of networks-on-chip (NoCs). The rationale for the use of multiple FPGAs for NoC prototyping is given. The architecture of the complex and its components–the software part generating top-level files and configuration files describing the NoC for several FPGAs, hardware part consisting of interfacing switches ...
Added: January 22, 2026
Lezhnev E., Romanov A., Telpukhov D. et al., Micromachines 2025 Vol. 16 No. 10 Article 1096
This article explores the concept of low-level modeling of networks-on-chip (NoCs). A method for reducing the low-level NoC model by replacing the real IP blocks with a data packet generator module is proposed. This makes it possible to significantly increase the maximum number of nodes in the simulated NoC, as well as speed up the ...
Added: September 17, 2025
Malikov M., Romanov A., IEEE Access 2025 Vol. 13 P. 148803–148815
Networks-on-chip (NoCs) widespread in computing system design are used in many applications. A critical NoC aspect is the interaction between computing cores and in particular the traffic patterns. The relevance of this work stems from the fact that traffic patterns in NoCs are poorly understood and have no general classification; and there are no universal ...
Added: September 16, 2025
Amerikanov A., Evtushenko L., Zunin V. et al., Труды Института системного программирования РАН 2025 Т. 37 № 1 С. 133–144
The paper is devoted to the description of the process of developing a new CAD architecture for high‑level modeling of NoC, as well as the remote flow of NoC design. The paper analyzes the main stages of NoC design and demonstrates the high importance of high-level modeling and its impact on the entire design process. ...
Added: November 15, 2024
Romanov A., Lerner A., Amerikanov A., The Journal of Supercomputing 2024 No. 80 P. 22462–22478
On-chip networks (NoCs) have become a popular choice for designing large multiprocessor architectures. Software-based emulation is often used to perform the design verifcation. However, if the considered design is sufciently large, softwarebased emulation becomes impractically slow. To avoid this limitation, multi-FPGA emulation was introduced, where multiple interconnected FPGAs collectively emulate a single circuit. The number ...
Added: June 30, 2024
Mikhail Yu. Romashikhin, , in: Proceedings 2024 International Russian Smart Industry Conference (SmartIndustryCon), 25-29 March 2024.: Sochi: IEEE, 2024. P. 104–108.
This article describes the implementation of regular topologies for networks-on-chip. The complexity of network development and its main parameters depend on the choice of topology. The rationale for the influence of topology on network bandwidth is given. Software that automates the generation of configuration files (bitstream) for the implementation of networks-on-chip with different topologies and ...
Added: May 13, 2024
Lezhnev E., Zunin V., Amerikanov A. et al., IEEE Access 2024 Vol. 12 P. 48750–48763
This article proposes a Network-on-Chip (NoC) communication subsystem model on the basis of which the Electronic Computer-Aided Design (ECAD) architecture in the form of software is implemented. It makes it possible to automate the process of preparing and generating an HDL description of the NoC model in the Verilog language. It is shown that not ...
Added: April 8, 2024
Sukhov A., Romanov A., Selin M., Symmetry 2024 Vol. 16 No. 1 Article 127
In this work, the circulant topology as an alternative to 2D mesh in networks-on-chip is considered. A virtual coordinate system for numbering nodes in the circulant topology is proposed, and the principle of greedy promotion is formulated. The rules for constructing the shortest routes between the two nodes based on coordinates are formulated. A technique ...
Added: March 8, 2024
Amerikanov A., Таржанов Т. В., Romanova I. et al., Труды Института системного программирования РАН 2023 Т. 35 № 5 С. 67–80
The paper analyzes the existing methods to optimize the time costs and increase the accuracy of calculations in the high-level simulation of networks-on-chip. The description of parameters and characteristics of networks-on-chip calculated by different models is given, and their influence on the speed of high-level simulation is analyzed. Adaptation of existing methods of modeling optimization ...
Added: March 8, 2024
A. M. Sukhov, A. Y. Romanov, A. A. Amerikanov, Lobachevskii Journal of Mathematics 2023 Vol. 44 No. 12 P. 5453–5459
The paper gives a solution for the problem of the topology of the communication subsystem graph for high-performance multi-core computing systems. In this graph, each vertex is connected to four neighbors, and the number of vertices is the maximum for a given graph diameter. The solution to this problem is the family of circulants C(D(D+1)+1; ...
Added: January 6, 2024
Sukhov A., Romanov A., Глушак Е. В., Ученые записки Казанского университета. Серия: Физико-математические науки 2023 Т. 165 № 3 С. 282–293
The article discusses routing methods in two-dimensional circulant graphs (each vertex is connected to four neighboring ones). The unique group of symmetries of the circulant graph makes it possible to use it as a topology for high performance computing devices, including networks-on-chip and cluster supercomputers. It is shown that the minimum number of transitions along ...
Added: January 5, 2024
Romanov A., Big Data and Cognitive Computing 2023 Vol. 7 No. 2 Article 80
This article presents software for the synthesis of circulant graphs and the dataset obtained. An algorithm and new methods, which increase the speed of finding optimal circulant topologies, are proposed. The results obtained confirm an increase in performance and a decrease in memory consumption compared to the previous implementation of the circulant topologies synthesis method. ...
Added: June 4, 2023
Lezhnev E., Проблемы разработки перспективных микро- и наноэлектронных систем (МЭС) 2021 № 1 С. 46–50
The process of designing a network-on-chip communication subsystem is a complex and time-consuming process, the task of which is to select the optimal characteristics in a given range of values. Although low-level modeling is time-consuming compared to high-level, but only this process allows to get the exact characteristics of the network. Comprehensive research, which is ...
Added: February 6, 2023
Aleksandr Y. Romanov, Nikolay M. Myachin, Evgenii V. Lezhnev et al., Micromachines 2023 Vol. 14 No. 1 Article 141
This article considers the usage of circulant topologies as a promising deadlock-free topology for networks-on-chip (NoCs). A new high-level model, Newxim, for the exploration of NoCs with any topology is presented. Two methods for solving the problem of cyclic dependencies in circulant topologies, which limit their applications for NoCs due to the increased possibility of ...
Added: January 31, 2023
El-Mesady A., Romanov A., Amerikanov A. et al., Algorithms 2023 Vol. 16 No. 1 Article 10
Recent developments in commutative algebra, linear algebra, and graph theory allow us to approach various issues in several fields. Circulant graphs now have a wider range of practical uses, including as the foundation for optical networks, discrete cellular neural networks, small-world networks, models of chemical reactions, supercomputing and multiprocessor systems. Herein, we are concerned with ...
Added: January 17, 2023
Monakhova E. A., Monakhov O. G., Romanov A., IEEE Transactions on Network Science and Engineering 2023 Vol. 10 No. 1 P. 413–425
The solution of the problem of organizing optimal communications in circulant networks of degree four is considered. For a family of optimal circulant networks with the minimum diameter and average distance for any number of nodes in a graph, we propose an optimal pair routing algorithm of constant complexity based on using the relative addressing ...
Added: November 18, 2022
Alijon F. Fatullaev, Edward R. Rzaev, Aleksandr Yu. Romanov, , in: 2022 International Russian Automation Conference (RusAutoCon).: IEEE, 2022. P. 419–423.
The article presents a study of clustering of Paley graphs with the arrangement of prime numbers in polar coordinates and a comparison of the resulting groups in terms of their static parameters; the application of fault-tolerant self-organizing routing method for new topologies is also considered. This article is a continuation of a series of articles ...
Added: October 2, 2022