Hardware-Software Complex for Network-on-Chip Prototyping Using Multiple FPGAs

IEEE Access. 2026. Vol. 14. P. 7921–7931.

Mikhail Y. Romashikhin, Aleksandr Y. Romanov

This paper presents a hardware-software multi-FPGA complex designed for hardware prototyping of networks-on-chip (NoCs). The rationale for the use of multiple FPGAs for NoC prototyping is given. The architecture of the complex and its components–the software part generating top-level files and configuration files describing the NoC for several FPGAs, hardware part consisting of interfacing switches between FPGAs, SoM modules with FPGAs, printed circuit board connecting the modules by a data bus–were developed. The work of the multi-FPGA complex developed was tested by calculating the examples of parallel computing tasks. The calculation of 100 digits of the π number by the Madhava series, Monte-Carlo method, and solution of the system of linear equations were chosen as a task of parallel calculations. The evaluation of benchmark developed showed that the multi-FPGA complex is suitable for NoC prototyping of parallel calculations and can be used in solving a variety of engineering problems besides NoC prototyping.

Keywords: автоматизация проектирования, параллельные вычисления, parallel computing, design automation, FPGA, ПЛИС, прототипирование, Система на кристалле, сеть на кристалле, system-on-chip, NoC benchmark, network-on-chip, prototyping