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## Разработка программного симулятора сетей на кристалле

Электроника и связь, Украина. 2011. Т. 4. № 63. С. 48–52.

Романов А. Ю., Феськов Д. А.

The article presents the concept of networks on chip (NoC) as a promising alternative to the communication subsystem for multiprocessor systems with bus architecture. Various approaches to modeling NoC are given and as the necessary software tools to evaluate NoC performance parameters the structure and simulation software solution for WFC-networks with virtual channels, XY-routing and various topologies are proposed. The testing of the simulator is performed by the example of the simulation of dependence of the average number of hops, needed for packets passing the network, from the dimension of NoC for mesh and torus topologies.

Romanov A., Вестник Южно-Уральского государственного университета. Серия: Компьютерные технологии, управление, радиоэлектроника 2015 Т. 15 № 1 С. 133–139

The article gives a review of existing methods of networks-on-chip design, based on the approach, in which the projection of the characteristic tasks graph is performed on a given regular topology. The general problem of the synthesis of networks-on-chip is characterized. The network topology can be foreknown (usually a regular topology) or selected in accordance ...

Added: February 5, 2015

Romanov A., Информационные технологии 2016 Т. 22 № 7 С. 498–503

This article gives an analysis of the effect of geometric shape of the topology and «hot spots» placement on the effectiveness of networks-on-chip. For this reason, a review of the main approaches to the modeling of networks-on-chip was made and the approach for networks on-chip modeling by using SystemC NoCTweak networks-on-chip simulator. The analysis of ...

Added: October 8, 2015

Sukhov A., Romanov A., Глушак Е. В., Ученые записки Казанского университета. Серия: Физико-математические науки 2023 Т. 165 № 3 С. 282–293

The article discusses routing methods in two-dimensional circulant graphs (each vertex is connected to four neighboring ones). The unique group of symmetries of the circulant graph makes it possible to use it as a topology for high performance computing devices, including networks-on-chip and cluster supercomputers. It is shown that the minimum number of transitions along ...

Added: January 5, 2024

Романов А.Ю., Сидоренко М.В., Монахова Э. А., Информационные технологии 2020 Т. 26 № 1 С. 22–29

The paper presents the implementation of a dynamic routing algorithm intended for use in networks-on-chip with a three-dimensional circulant topology of type C(N; s1, s2, s3). Compared with the classical algorithms A* or Dijkstra, the proposed algorithm does not require to calculate the entire path of the packet, but calculates the port number to which ...

Added: November 13, 2019

Romanov A., Ведмидь Е. А., Монахова Э. А., Информационные технологии 2019 Т. 25 № 9 С. 522–530

This paper presents implementation of several dynamic routing algorithms designed for using in networks-on-chip based on circulant topology of type C(N; 1, s2, s3) to search for the shortest routes between nodes. The developed algorithms can be implemented as RTL state machine for choosing the direction of packets in routers. Algorithms were tested on various sets ...

Added: September 27, 2019

Romanov A., Big Data and Cognitive Computing 2023 Vol. 7 No. 2 Article 80

This article presents software for the synthesis of circulant graphs and the dataset obtained. An algorithm and new methods, which increase the speed of finding optimal circulant topologies, are proposed. The results obtained confirm an increase in performance and a decrease in memory consumption compared to the previous implementation of the circulant topologies synthesis method. ...

Added: June 4, 2023

Лысенко А. Н., Romanov A., Вестник Национального технического университета Харьковский политехнический институт. Серия: Информатика и моделирование 2011 Т. 17 № 16 С. 86–92

Various approaches to networks on chip organizing are considered. Тhe main drawback of networks on chip packet switching is identified – an excessively large buffers amounts of input and output buffers of routers. The new router architecture with improved resource consumption and high speed action is offered. Figs: 5. Ref.: 12 titles. ...

Added: February 15, 2015

Yaganov P., Pavlov L., Romanov O., Science-Based Technologies. Science Journal. Ukraine 2013 Vol. 20 No. 4 P. 394–397

The main approaches to the synthesis of networks-on-chip based on regular and specialized topologies are analyzed. The optimality criteria of the topologies of networks-on-chip and a new class of quasi-optimal topologies and methods for their synthesis are proposes. The requirements for quasi-optimal topologies are defined. By using the mathematical methods of optimization the analysis of ...

Added: October 23, 2014

Romanov O., Electronics and Communications 2014 Vol. 19 No. 5(82) P. 53–56

The synthesis of network-on-chip topologies, based on the evolutionary computations method is proposed. The optimality criteria of the network-on-chip topologies and a new class of quasi-optimal topologies are proposed. The requirements for quasi-optimal topologies are defined. The genetic algorithm GeNoC for the synthesis of quasi-optimal networks-on-chip topologies with the number of nodes up to 100 ...

Added: March 9, 2015

El-Mesady A., Romanov A., Amerikanov A. et al., Algorithms 2023 Vol. 16 No. 1 Article 10

Recent developments in commutative algebra, linear algebra, and graph theory allow us to approach various issues in several fields. Circulant graphs now have a wider range of practical uses, including as the foundation for optical networks, discrete cellular neural networks, small-world networks, models of chemical reactions, supercomputing and multiprocessor systems. Herein, we are concerned with ...

Added: January 17, 2023

Попов М. А., Машковская М. С., Romanov A., Информационные технологии 2023 Т. 29 № 2 С. 98–103

Представлена перспективная встраиваемая система управления, предназначенная для работы в составе промышленного оборудования, требующего многоосевого позиционирования и высокоскоростной передачи данных. Предложено применение модуля Kria SOM, разработанного компанией AMD-Xilinx (США) вместо микросхемы предыдущего поколения. Это позволило увеличить скорость вычислений до 5 раз, снизить стоимость компонентов до 10 раз, упростить печатную плату, уменьшив количество слоев с 14..16 до ...

Added: June 14, 2024

Romanov A., Вестник Национального технического университета Харьковский политехнический институт. Серия: Информатика и моделирование 2011 Т. 36 № 17 С. 149–155

The main advantages and disadvantages of classical topologies of networks on chip (NoC) are considered. The algorithm for finding optimal topologies in accordance with the restrictions on the diameter and maximum degree of optimization on the number of connections and the average distance proposed and implemented in software. The optimized topologies for the NoCs with ...

Added: February 15, 2015

Aleksandr Y. Romanov, Nikolay M. Myachin, Evgenii V. Lezhnev et al., Micromachines 2023 Vol. 14 No. 1 Article 141

This article considers the usage of circulant topologies as a promising deadlock-free topology for networks-on-chip (NoCs). A new high-level model, Newxim, for the exploration of NoCs with any topology is presented. Two methods for solving the problem of cyclic dependencies in circulant topologies, which limit their applications for NoCs due to the increased possibility of ...

Added: January 31, 2023

A. M. Sukhov, A. Y. Romanov, A. A. Amerikanov, Lobachevskii Journal of Mathematics 2023 Vol. 44 No. 12 P. 5443–5449

The paper gives a solution for the problem of the topology of the communication subsystem graph for high-performance multi-core computing systems. In this graph, each vertex is connected to four neighbors, and the number of vertices is the maximum for a given graph diameter. The solution to this problem is the family of circulants C(D(D+1)+1; ...

Added: January 6, 2024

Феськов Д. О., Романов О. Ю., Короткий Є. В., Проблеми iформатизацii та управлiння 2013 No. 2 (42) P. 118–123

The review of different approaches to the simulation of the networks-on-chip (NoC) is performed. The simulator of the NoC where the topology is set with the matrix of connections between the routers that manage the traffic by means of the routing tables is developed. The capabilities of the NoC simulator are examined and the results ...

Added: February 18, 2015

Романов О. Ю., Лисенко О. М., Наукоємні технології 2014 Vol. 1 No. 21 P. 49–54

The comparative analysis of different approaches to modeling of networks on chip (SoC) is provided in the article. The basic directions of exploratory research topics of SoC are defined and it is shown that modeling, analysis and simulation of SoC are basical to conduct other researches.
The typical approaches to modeling of the SoC and examples ...

Added: October 31, 2014

Sukhov A., Romanov A., Selin M., Symmetry 2024 Vol. 16 No. 1 Article 127

In this work, the circulant topology as an alternative to 2D mesh in networks-on-chip is considered. A virtual coordinate system for numbering nodes in the circulant topology is proposed, and the principle of greedy promotion is formulated. The rules for constructing the shortest routes between the two nodes based on coordinates are formulated. A technique ...

Added: March 8, 2024

A. Romanov, A. Amerikanov, E. Leghnev, Journal of Physics: Conference Series 2018 Vol. 1050 No. 1 P. 1–12

The article gives a review of existing methods of network-on-chip design based on the approach in which mapping of the characteristic tasks graph is performed on a given regular topology. The networks-on-chip synthesis problem is generally characterized. The analysis and comparison of standard topologies (mesh and torus) with circulant topologies are performed. Advantages and disadvantages ...

Added: May 25, 2018

Romanov A., Tumkovskiy S., Иванова Г. А., Вестник РГРТУ 2015 Т. 2 № 52 С. 61–66

A review of the networks-on-chip modeling methods is given. A high-level model of networks-on-chip based on the programming language Java, which helps to accelerate the modeling process by several orders, compared to HDL‑models is developed. The results of simulation of networks-on-chip based on regular and quasi-optimal topologies with the number of nodes up to 100 ...

Added: June 21, 2015

Monakhova E. A., Monakhov O. G., Romanov A., IEEE Transactions on Network Science and Engineering 2023 Vol. 10 No. 1 P. 413–425

The solution of the problem of organizing optimal communications in circulant networks of degree four is considered. For a family of optimal circulant networks with the minimum diameter and average distance for any number of nodes in a graph, we propose an optimal pair routing algorithm of constant complexity based on using the relative addressing ...

Added: November 18, 2022

Romanov A., Вестник Национального технического университета Харьковский политехнический институт. Серия: Информатика и моделирование 2012 Т. 38 № 18 С. 156–162

The different approaches to the optimization of network communications subsystem on a chip are considered. The mesh and pseudo-optimal topologies with 8 and 9 nodes using System Verilog library Netmaker are modelled. It is shown, that mesh topologies of rectangular form are less efficient, than square ones; pseudo-optimal topologies have a higher threshold of saturation ...

Added: February 15, 2015

Khromov I. A., Petukhov A. A., Качество. Инновации. Образование 2015 № 12 С. 79–85

Wireless body area networks standard (WBAN, IEEE 802.15.6) is currently an active area of research. In this paper, we present the criteria for the selection of a modeling system which is most suitable for the WBAN research. The structural model of the WBAN node is given. We reviewed and compared existing open-source modeling systems, such ...

Added: February 6, 2016

Rzaev E., Romanov A., , in : 2021 International Russian Automation Conference (RusAutoCon). : IEEE, 2021. P. 421–425.

Added: September 25, 2021

Romanov A. Yu., Romanova I., , in : 2015 IEEE 35th International Scientific Conference on Electronics and Nanotechnology, ELNANO 2015 - Conference Proceedings. : Kiev: NTUU "KPI", 2015. P. 445–449.

This article gives a review of existing methods of designing of networks‑on‑chip (NoC), based on the approach that makes the projection of the characteristic task graph on a given regular topology. The general problem of NoC synthesis is characterized. The network topology can be either specialized and selected depending on the tasks to be performed or ...

Added: April 26, 2015