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TCAD analysis of self heating effects in bulk silicon and SOI n-MOSFETs
P. P1–08.
3D device simulations accounting for self-heating effects in bulk silicon and SOI n-MOSFET’s with 0.1 um gate size were performed. The temperature distribution in the transistors channels and the maximum operation temperature were acquired. The self-heating effect in the SOI MOSFET with different active silicon film thickness was investigated.
In book
M.: ФТИАН, 2012.
Konstantin O. Petrosyants, Denis S. Silkin, Dmitriy A. Popov, , in: Proceedings of the Future Technologies Conference (FTC) 2024, Volume 3. (LNNS, volume 1156).: Switzerland: Springer, 2024. P. 643–652.
Added: November 6, 2025
Зубкова А. И., Kharitonov I. A., Наноиндустрия 2025 Т. 18 № S11-2(135) С. 871–879
The paper considers electrothermal simulation of MOSFET power circuits realized using Python Spice software. Besides, it presents an algorithm for accelerating the process of electro-thermal characteristics estimation for power circuits using Python software, as well as the results of electro-thermal calculations with the accelerated process features and with conventional electro-thermal SPICE simulations for two power ...
Added: November 5, 2025
Popov D., Жаров Е. Е., Наноиндустрия 2024 Т. 17 № S10-2(128) С. 707–709
В работе рассматривается возможность применения методов машинного обучения для моделирования вольт-амперных характеристик МОП-транзистора. Приведено обоснование замены приборно-технологического моделирования на модели полупроводниковых компонентов на базе нейронных сетей (ML-TCAD). Для иллюстрации подхода разработана модель для 130-нм МОП-транзистора и проведен расчет входных вольт-амперных характеристик (ВАХ). ...
Added: April 13, 2025
Максименко Ю. Н., Petrosyants K. O., Силкин Д. С. et al., Известия высших учебных заведений. Электроника 2024 Т. 29 № 6 С. 772–786
Physical and mathematical model of a transistor with static induction makes it possible to calculate the main current-voltage characteristics and to analyze the design of devices for static mode in bipolar operation of transistor, and also to understand the possibilities of crystal design improvement. However, this model does not allow analyzing the operation of devices ...
Added: February 14, 2025
Зубкова А. И., Kharitonov I. A., Наноиндустрия 2024 Т. 17 № S10-2(128) С. 745–751
The study presents the Python program which implements digital twins for powerful MOSFET transistors. The program possibilities, structure, interface have been described and demonstrated. The examples of program generated MOSFET characteristics have been presented for domestic power MOSFET transistors 2P829D and 2P782G1. ...
Added: September 3, 2024
Petrosyants K. O., Kharitonov I. A., Силкин Д. С. et al., Наноиндустрия 2024 Т. 17 № S10-1(128) С. 302–312
The paper considers qualitative estimations of CMOS SRAM Cells sensitivity to SEU performed for technological nodes varying from 90 nm up to 28 nm using verified TCAD-SPICE software tools and models. The process and results of simulations have been presented. The estimations of CMOS SRAM cells hardness to SEU have been confirmed using SRAM measurement ...
Added: September 3, 2024
Petrosyants K. O., Kharitonov I. A., Тегин М. С., Известия высших учебных заведений. Электроника 2024 Т. 29 № 1 С. 65–78
Большие скачки температуры в структурах мощных полупроводниковых приборов при их включении и выключении существенно снижают надежность работы силовых схем. Широко используемые маршруты электротеплового моделирования тепловых схем имеют ряд недостатков: использование взаимосвязанных Spice-симуляторов электрических цепей и пакета 3D численного моделирования тепловых полей требует детального описания 3D-конструкций и больших затрат компьютерного времени; использование только Spice-подобных симуляторов электрических ...
Added: May 7, 2024
Petrosyants K. O., Силкин Д. С., Popov D. et al., Известия высших учебных заведений. Электроника 2023 Т. 28 № 6 С. 826–837
С уменьшением размеров транзисторов возникают условия, когда удар одной частицы затрагивает сразу несколько транзисторов в составе ячейки памяти. Вследствие этого при моделировании недостаточно учитывать один транзистор, в который непосредственно попадает частица. В работе рассмотрена полноразмерная 3D-модель двух n-канальных транзисторов, являющихся частью 6T-ячейки памяти, в которую ударяет заряженная частица. Предложен способ моделирования удара частицы, который позволяет ...
Added: January 11, 2024
Petrosyants K. O., Denis S. Silkin, Popov D., Micromachines 2022 Vol. 13 No. 8 Article 1293
A complete comparison for 14 nm FinFET and NWFET with stacked nanowires was carried out. The electrical and thermal performances in two device structures were analyzed based on TCAD simulation results. The electro-thermal TCAD models were calibrated to data measured on 30–7 nm FinFETs and NWFETs. The full set of output electrical device parameters Ion, ...
Added: October 30, 2022
K.O. Petrosyants, D.S. Silkin, D.A. Popov et al., , in: Proceedings of 2022 IEEE Moscow Workshop on Electronic and Networking Technologies (MWENT).: M.: IEEE, 2022. P. 1–4.
Added: July 13, 2022
Petrosyants K. O., Силкин Д. С., Popov D., В кн.: Проблемы разработки перспективных микро- и наноэлектронных систем – 2021 (МЭС-2021)Вып. 4.: М.: ИППМ РАН, 2021. Гл. 86 С. 2–6.
Added: October 31, 2021
Wang Y., Liu F., Li B. et al., IEEE Transactions on Nuclear Science 2021 Vol. 68 No. 8 P. 1660–1667
The dependence of temperature and back-gate bias on single-event upset (SEU) sensitivity is investigated based on a 0.2- μm double silicon-on-insulator (DSOI) technology. At room temperature, an obvious decrease in SEU cross section with the negative back-gate bias is experimentally observed for a DSOI static random access memory (SRAM). The physical mechanism of single-event effect ...
Added: September 26, 2021
Ismail-zade M. R., Petrosyants K. O., Sambursky L. M. et al., , in: 2020 26th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC).: IEEE, 2020. P. 97–103.
A set of modified compact SPICE models of various flavours of MOSFETs (fabricated by bulk, SOI and SOS technologies) is presented for circuit simulation in the deep-cryogenic temperature range down to 4 K, which is important for space applications and development of scalable quantum computers. All models are constructed using the approach combining macromodeling based ...
Added: June 5, 2021
K. O. Petrosyants, D. A. Popov, M. R. Ismail-Zade et al., , in: Проблемы разработки перспективных микро- и наноэлектронных систем (МЭС-2020).Вып. 4.: ИППМ РАН, 2020. P. 2–8.
Two types of the MOSFET models available in commercial versions of TCAD and SPICE simulators are completed with additional equations taking into account radiation effects. The adequacy of the models is demonstrated on two examples 1) 0.2 um and 0.24 um SOI/DSOI MOSFETs considering TID effects and single heavy ion impact, and 2) 28 nm bulk MOSFET, 45 nm and 28 nm ...
Added: December 5, 2020
Petrosyants K. O., Popov D., Russian Microelectronics 2019 Vol. 48 No. 7 P. 467–469
SOI MOSFETs have the worst properties of heat removal from an active region, which negatively
affects the reliability and efficiency of integrated circuits. Using TCAD modeling, we investigate the self-heating
effect in the following structures of deeply submicron MOSFETs with different configurations of buried
oxide: traditional bulk MOSFET, SOI structure, SELBOX structure, partial SOI structure, thin-BOX SOI
structure, UTBB ...
Added: March 24, 2020