Parameterized Computing Module Generator Based on a Systolic Array

P. 217–220.

V.V. Zunin, I.I. Romanova

In this paper, the use of systolic arrays for data processing in the training or executing neural networks is explored. Two types of systolic arrays were developed, and a comparison on spending resources (ALM) and result calculation time was made. The comparison was conducted with two variable parameters of the input matrices: the number of rows of the first matrix and the number of columns of the second matrix. It is shown that (depending on the available resources) one of the methods for calculating the result can be used to synthesize the systolic array module: 1) to generate a systolic array of a given size and multiply matrices in which the first of them does not exceed the array size; 2) to synthesize a systolic array of a limited size and perform the multiplication of two matrices using the “Divide-and-Conquer” algorithm.

Keywords: neural networks, FPGA, systolic array

In book

IEEE International Conference on Industry 4.0, Artificial Intelligence, and Communications Technology (IAICT)

IEEE, 2022.