Charged Board Event Analysis Using Circuit Simulator for PCB Mounted MOSFET
Discusses modeling of semiconductor components on printed circuit boards by electrostatic discharges.
The considered model of the failure rate of CMOS VHSIC design proposed in the article Piskun G.A., Alekseev V.F., "Improvement of mathematical models calculating of CMOS VLSIC taking into account features of impact of electrostatic discharge", published in the first issue of the journal "Technologies of electromagnetic compatibility" for the year 2016. It is shown that the authors claim that this model "...will more accurately assess the reliability of CMOS VHSIC design" is fundamentally flawed and its application will inevitably lead to inadequate results. Alternatively, the proposed model of the failure rate of CMOS VHSIC design, which also allows to take into account the views of ESD, but based on the use of resistance characteristics of CMOS VHSIC to the effects of ESD.
System for thermal design on chip- and board-level of electronic components is introduced. It is integrated with Mentor Graphics CAD and consists of three subsystems: thermal design in IC Station; thermal design in Expedition PCB; thermal measurement for verification of temperature modeling results.
The main target of the IEEE East-West Design & Test Symposium (EWDTS-2013) is to exchange experiences between scientists and technologies of Eastern and Western Europe, as well as North America and other parts of the world, in the field of design, design automation and test of electronic circuits and systems. EWDTS’13 covers the following topics:
• Analog, Mixed-Signal and RF Test
• Analysis and Optimization
• EDA Tools for Design and Test
• Failure Analysis, Defect and Fault
• Modeling & Fault Simulation
• Power Issues in Testing
• Reliability of Digital Systems
• Thermal, Timing and Electrostatic Analysis of SoCs and Systems on Board
These are the proceedings of the International Workshop on Petri Nets and Software Engineering (PNSE’16) in Torun, Poland, June 20–21, 2016. It is a co-located event of • Petri Nets 2016 – the 37th International Conference on Applications and Theory of Petri Nets and Concurrency and • ACSD 2016 – the 16th International Conference on Application of Concurrency to System Design. More information about the workshop can be found at http://www.informatik.uni-hamburg.de/TGI/events/pnse16/ For the successful realization of complex systems of interacting and reactive software and hardware components the use of a precise language at different stages of the development process is of crucial importance. Petri nets are becoming increasingly popular in this area, as they provide a uniform language supporting the tasks of modeling, validation and verification. Their popularity is due to the fact that Petri nets capture fundamental aspects of causality, concurrency and choice in a natural and mathematically precise way without compromising readability. The use of Petri nets (P/T-nets, colored Petri nets and extensions) in the formal process of software engineering, covering modeling, validation and verification, is presented as well as their application and tools supporting the disciplines mentioned above.
Automated electro-thermal analysis is realized in the last version of Mentor Graphics PCB Design System. The special software tool AETA is developed and integrated into the Expedition Enterprise PCB Design System to automate the process of power-temperature traffic between electrical and thermal simulators. Furthermore AETA provides the graphical user interface and the possibility to use the different versions of Mentor Graphics software.
A general idea of the qualitative study of dynamical systems, going back to the works by A. Andronov, E. Leontovich, A. Mayer, is a possibility to describe dynamics of a system using combinatorial invariants. So M. Peixoto proved that the structurally stable flows on surfaces are uniquely determined, up to topological equivalence, by the isomorphic class of a directed graph. Multidimensional structurally stable flows does not allow entering their classification into the framework of a general combinatorial invariant. However, for some subclasses of such systems it is possible to achieve the complet combinatorial description of their dynamics.
In the present paper, based on classification results by S. Pilyugin, A. Prishlyak, V. Grines, E. Gurevich, O. Pochinka, any connected bi-color tree implemented as gradient-like flow of $n$-sphere, $n > 2$ without heteroclinic intersections. This problem is solved using the appropriate gluing operations of the so-called Cherry boxes to the flow-shift. This result not only completes the topological classification for such flows, but also allows to model systems with a regular behavior. For such flows, the implementation is especially important because they model, for example, the reconnection processes in the solar corona.
The methodology and software tools for multi-level thermal and electro-thermal design of electronic components is presented. The discussion covers 2D/3D constructions of: 1) discrete and integrated semiconductor devices; 2) monolithic and hybrid ICs; 3) MCMs and PCBs. The actual test validation through thermal measurement is demonstrated for all types of components.
These are the proceedings of the International Workshop on Petri Nets and Software Engineering (PNSE’13) and the International Workshop on Modeling and Business Environments (ModBE’13) in Milano, Italy, June 24–25, 2013. These are co-located events of Petri Nets 2013, the 34th international conference on Applications and Theory of Petri Nets and Concurrency.
PNSE'13 presents the use of Petri Nets (P/T-Nets, Coloured Petri Nets and extensions) in the formal process of software engineering, covering modelling, validation, and veriﬁcation, as well as their application and tools supporting the disciplines mentioned above.
ModBE’13 provides a forum for researchers from interested communities to investigate, experience, compare, contrast and discuss solutions for modeling in business environments with Petri nets and other modeling techniques.