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August 25, 2026
Scientists Develop Algorithm for More Reliable Processors in Data Centres
Researchers from HSE MIEM and Samara University have developed the LRF-3D algorithm to automatically bypass idle nodes in three-dimensional networks-on-chip. Thanks to its hierarchical architecture, the algorithm outperforms existing solutions in both speed and path accuracy, improving processor reliability for use in data centres, supercomputers, and AI computing. The source code and test results are publicly available.
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The International Laboratory for Social Integration Research (ILSIR) at HSE University studies the challenges faced by vulnerable groups and explores ways to help them participate fully in everyday life. To develop effective solutions, the laboratory’s researchers combine cutting-edge methods with practical fieldwork. In this interview with the HSE News Service, Laboratory Head Elena Iarskaia-Smirnova discusses the laboratory’s work.

 

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?

Russian Learner Corpus: Towards Error-Cause Annotation for L2 Russian

P. 14240–14258.
Kosakin D., Obiedkov S., Smirnov I., Rakhilina E. V., Vyrenkova A. S., Zalivina, E.
Language: English
Full text
Text on another site
Keywords: error classificationLearner Corpus(LC)L2 error processingautomatic error annotationcrowdsourced correctionsgrammatical error correction

In book

Proceedings of the 2024 Joint International Conference on Computational Linguistics, Language Resources and Evaluation (LREC-COLING 2024)
ELRA and ICCL, 2024.
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