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Reconciling Event Structures with Modern Multiprocessors

Ch. 5. P. 5:1–5:26.
Moiseenko E., Podkopaev A., Lahav O., Melkonian O., Vafeiadis V.

 

Weakestmo is a recently proposed memory consistency model that uses event structures to resolve the infamous "out-of-thin-air" problem and to enable efficient compilation to hardware. Nevertheless, this latter property - compilation correctness - has not yet been formally established. This paper closes this gap by establishing correctness of the intended compilation schemes from Weakestmo to a wide range of formal hardware memory models (x86, POWER, ARMv7, ARMv8) in the Coq proof assistant. Our proof is the first that establishes correctness of compilation of an event-structure-based model that forbids "out-of-thin-air" behaviors, as well as the first mechanized compilation proof of a weak memory model supporting sequentially consistent accesses to such a range of hardware platforms. Our compilation proof goes via the recent Intermediate Memory Model (IMM), which we suitably extend with sequentially consistent accesses.

Language: English
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Keywords: Weak memory consistencyIMMEvent StructuresWeakestmo

In book

34th European Conference on Object-Oriented Programming (ECOOP 2020)
Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik, 2020.
Similar publications
Bridging the gap between programming languages and hardware weak memory models
Podkopaev A., Lahav O., Vafeiadis V., , in: Proceedings of the ACM on Programming Languages. Volume 3 Issue POPL, January 2019Vol. 3: POPL.: NY: ACM, 2019. Ch. 69 P. 1–31.
We develop a new intermediate weak memory model, IMM, as a way of modularizing the proofs of correctness of compilation from concurrent programming languages with weak memory consistency semantics to mainstream multi-core architectures, such as POWER and ARM. We use IMM to prove the correctness of compilation from the promising semantics of Kang et al. ...
Added: February 6, 2019
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