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August 25, 2026
Scientists Develop Algorithm for More Reliable Processors in Data Centres
Researchers from HSE MIEM and Samara University have developed the LRF-3D algorithm to automatically bypass idle nodes in three-dimensional networks-on-chip. Thanks to its hierarchical architecture, the algorithm outperforms existing solutions in both speed and path accuracy, improving processor reliability for use in data centres, supercomputers, and AI computing. The source code and test results are publicly available.
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Modeling of Interconnection Process in the Parallel Spatial Switching Systems

P. 1–3.
Stukach O., Kutuzov D., Osovskiy A.

The paper deals with the problem of modeling of parallel spatial switching systems. We propose a new crossbar
switch structure with adaptive control of interconnection. The set-theoretic, automata model, and a model based on Petri net has been presented.

Language: English
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Keywords: Переключательparallel switchingswitching element

In book

2016 International Siberian Conference on Control and Communications (SIBCON). Proceedings
2016 International Siberian Conference on Control and Communications (SIBCON). Proceedings
M.: HSE, 2016.
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