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Debugging test set generation for digital control system functions
Digital control systems are considered, the functioning of which can be represented as a sequence of functions of a finite alphabet. For such systems design debugging by simulation it is necessary to generate the minimal complete, in the sense of a particular criteria, set of tests for applying to the simulated system to verify the correctness of functioning. Digital control systems are simulated on the logic level of the signals they exchange with external environment, including controlled object. As input data for the simulation input interactions are used, comprising both the actual input signals and output exchange control signals. We consider control digital systems the functioning of which can be represented in the form of a sequence of functions from a finite alphabet. For the development of projects of such systems by the modeling method, it is necessary to form a minimum complete, in the sense of a certain criterion, set of test actions for the simulated system to verify the correctness of its functioning. Control digital systems are modeled at the level of the logical signals that they exchange with the external environment, including those with managed objects. Inputs for simulation are input interactions which include both the actual input signals and the output control signals of the exchange. Algorithm of the minimal complete test set generation for design debugging is proposed, the algorithm is based on developer-defined classes of equivalence of input interactions.
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