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Построение проверяющих тестов дискретных схем на основе непрерывных расширений булевых функций
Purpose: Create a novel algorithm for gate-level test pattern generation for combinational circuits. Design/methodology/approach: Test generation method for combinational circuits by means of continuous optimization is proposed. The classical ATPG methods target the problem at the logical level and use a discrete approach for simulation of the circuit behavior. This paper presents a new approach for circuit simulation using continuous set of values. In scope of this approach a continuous gate-level model of a circuit is introduced. Boolean functions of the gates are replaced with corresponding continuous analogues. The continuous objective function is constructed and then the problem of test pattern generation is solved by means of maximization of the objective function. Experimental results for ISCAS’85benchmarks are presented to demonstrate the effectiveness of the method proposed.