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Инструмент автоматизации разработки генераторов тестовых программ для микропроцессоров на основе формальных спецификаций
С. 53–54.
In book
М.: МИЭМ НИУ ВШЭ, 2015.
Tatarnikov A., Kamkin A., Проценко А. С. et al., Проблемы разработки перспективных микро- и наноэлектронных систем (МЭС) 2018 № 2 С. 2–8
In this paper, a specification-based test program generator for functional verification of RISC-V microprocessors is presented. The tool is based on the MicroTESK framework and consists of two main parts: (1) the formal specifications of the RISC-V ISA and (2) the ISA-independent generation core. Test programs are generated on the basis of the ISA specifications and test templates ...
Added: October 30, 2018
Tatarnikov A., Kamkin A., Смолов С. А. et al., Программирование 2014 Т. 1 № 40 С. 3–14
Development of test programs and analysis of the results of their execution is the basic approach to verification of microprocessors at the system level. There is a variety of methods for the automation of test generation, starting with the generation of random code and ending with directed model-based test generation. However, there is no cure-all ...
Added: February 5, 2018
Tatarnikov A., Известия высших учебных заведений. Физика 2016 Т. 59 № 8-2 С. 97–100
The paper proposes a method of automated construction of behavior models of microprocessors, which are used in the process of test program generation to predict the results. The proposed method is based on using formal specifications of instruction set architecture. The method is implemented in MicroTESK, a test program generation tool being developed at ISP ...
Added: February 2, 2018
Tatarnikov A., Kamkin A., Проценко А. С., Известия высших учебных заведений. Физика 2015 Т. 58 № 11-2 С. 70–74
А method for automated generating test programs for functional testing of single-core microprocessor memory subsystems is proposed. The proposed method is based on formal specifications of the caching and address translation mechanisms. The method variants have been successfully applied to testing of industrial microprocessors. ...
Added: January 25, 2018
Tatarnikov A., Kamkin A., Чупилко М. М. et al., , in: Hardware and Software: Verification and Testing. HVC 2017. Lecture Notes in Computer ScienceVol. 10629: 13th International Haifa Verification Conference, HVC 2017, Haifa, Israel, November 13-15, 2017.: Cham: Springer, 2017. P. 217–220.
The paper presents MicroTESK, a tool that automates construction of test program generators for microprocessors. A constructed generator consists of the core that implements architecture-independent generation methods and the model that holds information required to generate tests for the corresponding architecture. The tool extracts this information from formal specifications of the instruction set architecture. The ...
Added: January 24, 2018
Tatarnikov A., Kamkin A., , in: Perspectives of System Informatics - 11th International Andrei P. Ershov Informatics Conference, PSI 2017, Moscow, Russia, June 27-29, 2017, Revised Selected Papers, Lecture Notes in Computer ScienceVol. 10742.: Springer, 2018. P. 387–393.
The paper presents MicroTESK, a tool for test program generation for functional verification of microprocessors. It generates test programs from templates which describe generation tasks in terms of constraints that must be satisfied in order to reach certain coverage goals. The tool uses formal specifications of the instruction set as a source of knowledge about ...
Added: January 23, 2018
Tatarnikov A., , in: Proceedings of IEEE East-West Design & Test Symposium (EWDTS'2016).: Yerevan: IEEE, 2016. P. 270–273.
The paper proposes an approach to instruction stream generation for verification of microprocessor designs. The approach is based on using formal specifications of the instruction set architecture as a source of knowledge about the design under verification. This knowledge is processed with generic engines implementing an extensible set of generation strategies to produce stimuli in ...
Added: December 22, 2017